Identifying and Mapping Impurity Sources in Deposition-Prone Chemicals for Wafer Surface Wet Processing

Authors

DOI:

https://doi.org/10.52825/siliconpv.v3i.2696

Keywords:

Wafer Wet Chemistry, Chemical Bath Deposition, Impurity Diffusion

Abstract

Contaminant levels in chemicals used for wet processing are critical to solar cell performance. During wafer immersion in chemical and DI water baths, a thin film forms on the surface, trapping impurities. Also, recycled polysilicon for ingot and wafer manufacturing utilizes similar chemicals for etching, which are again prone to contamination. Contaminants often enter during chemical handling, which is outside the defined boundary of cell and ingot manufacturing area. Despite multiple purification steps, impurities persist even in electronic or photovoltaic grade chemicals. Key chemicals such as HCl, HF, H₂O₂, HNO₃, KOH, and DI water were analysed using ICP-MS to trace elemental impurities, often linked to raw materials (e.g., As and K from fluorspar) or contact with construction materials (e.g., Fe, Mn, and Cr from mild steel piping). Impurities adhering to wafer surfaces, particularly Fe, can reach concentrations up to 10¹¹ atoms/cm², significantly affecting carrier lifetime and cell efficiency. The Landau-Levich equation indicates that higher withdrawal velocities result in thicker films, increasing impurity deposition rates. To mitigate these detrimental effects, impurities must be eliminated at the source, and tolerance limits should be established based on their deposition susceptibility through the liquid film. This study quantifies impurities that may be carried forward in wafer and cell processing, ultimately hindering solar cell functionality. It underscores the necessity of controlling contamination sources in chemical processing to enhance solar cell efficiency and lifetime.

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References

[1] M. W. Johnson, "Understanding metallic and ionic contamination in photovoltaic wet chemistries from chemical delivery systems," 2010 35th IEEE Photovoltaic Specialists Conference, Honolulu, HI, USA, 2010, pp. 003505-003509.

[2] L. H. Hall, "A Materials Approach to Silicon Wafer Level Contamination Issues from the Wet Clean Process," University of North Texas, Denton, TX, USA, 2013, pp. 1-200.

[3] A. J. Bard and L. R. Faulkner, "Wet-Chemical Etching and Cleaning of Silicon," University of Pennsylvania, Philadelphia, PA, USA, 2001, pp. 1-50.

[4] M. W. Johnson and A. Gildor, "Deposition of contaminants on silicon media during wet processing," 2011 37th IEEE Photovoltaic Specialists Conference, Seattle, WA, USA, 2011, pp. 001079-001080.

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Published

2026-01-12

How to Cite

R Iyer, S., & Maru, B. (2026). Identifying and Mapping Impurity Sources in Deposition-Prone Chemicals for Wafer Surface Wet Processing. SiliconPV Conference Proceedings, 3. https://doi.org/10.52825/siliconpv.v3i.2696

Conference Proceedings Volume

Section

Characterisation, Modelling and Simulation
Received 2025-04-11
Accepted 2025-09-04
Published 2026-01-12